Research project Upgrade of the ATLAS hadronic Tile Calorimeter for the high-luminosity LHC
We are developing new on-detector control and fiber optic readout electronics for the ATLAS experiment at the Large Hadron Collider (LHC) at CERN, to meet the significant challenges of data taking as the LHC beam intensity is strongly increased.
The project is an important upgrade to the ATLAS Hadronic Tile Calorimeter (TileCal) for data-taking at the high-lumniosity LHC at CERN. We are developing a high-speed link daughter board (DB) that will be the central control, timing and readout hub of the new TileCal on-detector electronics, continuously collecting and transmitting digitized data off of the detector. The DB design combines CERN-developed radiation-hard timing and data link ASICs with commercial programmable logic devices FPGAs and fiber optic transceivers, and a highly redundant architecture to minimize single-point failure modes and radiation-induced disruptions. We will produce and deliver over 1000 DBs for delivery to CERN, and our current activities include prototype development, radiation qualification, and integration tests.
Project description
The high luminosity upgrade of the Large Hadron Collider (HL-LHC) is aimed at increasing the volume of collision data delivered to the experiments by an order of magnitude over the original design goal. This will entail a five- to ten-fold increase in the number of particle collisions per 25ns bunch crossing, resulting in higher- rates of pileup in each event and correspondingly higher radiation exposure to the detectors and on-detector electronics. As part of the ATLAS HL-LHC upgrade program, the hadronic Tile Calorimeter (TileCal) is being upgraded with new on- and off-detector electronics systems. The new system will provide continuous digital readout of the full-granularity calorimeter data off of the detector and to the upgraded ATLAS trigger and data acquisition systems. This will allows improved-resolution data to be provided tothe ATLAS first-level trigger, allowing more sophisticated selection algorithms for maintaining data readout volumes at manageable levels without sacrificing physics efficiency. High reliability and radiation tolerance will be critical for the front-end systems, and the TileCal upgrade will achieve these through a modular design with extensive use of redundancy, and radiation testing and qualification of all components used. SU researchers are developing a high-performance control and readout link Daughter Board (DB) for this new system. The DB is designed around two large commercial programmable logic devices (FPGAs) which provide control and timing distribution for the on-detector system, read out digitized detector pulse data, and transmit them off of the detector over dual-redundant 9.6 Gb/s fiber optic links. The DB also incorporates a redundant pair of CERN-developed radiation-hard timing and data link devices (GBTx) which receive 4.8 Gb/s optical links from the off-detector systems containing control and configuration data and high-quality timing signals. The project is currently in an intensive period of prototype development, radiation qualification, and integration tests, and will culminate in production and delivery of more than 1000 Daughter Boards to CERN for the high-luminosity upgrade of LHC and ATLAS.
Project members
Project managers
Samuel Silverstein
Universitetslektor
Members
Christian Bohm
Professor emeritus
Christophe Marcel Victor Clement
Professor
Katherine Dunne
Doktorand
Holger Motzkau
Senior research engineer
Eduardo Valdés Santurio
Postdoctoral fellow
